TY - GEN
T1 - Vicilogic
T2 - 20th International Conference on Remote Engineering and Virtual Instrumentation: Open Science in Engineering, REV 2023 co-organized with the International Edunet World Conference, IEWC 2023
AU - Morgan, Fearghal
AU - Bakó, László
AU - O’Loughlin, Declan
AU - George, Roshan
AU - Beretta, Arthur
AU - Rousseau, Frédéric
AU - Gallivan, Ian
AU - Timlin-Canning, Niall
AU - Bupathi, Abishek
AU - Byrne, John Patrick
AU - Callaly, Frank
N1 - Publisher Copyright:
© 2023, The Author(s), under exclusive license to Springer Nature Switzerland AG.
PY - 2023
Y1 - 2023
N2 - Vicilogic links online learning, assessment, and prototyping with remote Field Programmable Gate Array (FPGA) hardware. Vicilogic provides online training and practice in digital systems design, RISC-V computer architecture and applications, and FPGA-based data and pixel processing applications. The Vicilogic course browser interacts with transparently with an array of remote FPGA, controlling and probing real remote hardware signals. This enables presentation of a visually rich, interactive learn-by-doing pedagogy, supporting guided learning, self-paced training, component sandboxes, knowledge checks, automated hardware application execution demos and remote FPGA prototyping. The Vicilogic course builder provides course tutors with the facility to create new course modules and to select individual lessons to create a tailored, indexed course to align with their curriculum. This paper presents the current Vicilogic course portfolio, available to Electronic and Computer Engineering and Computer Science audiences. The recently developed FPGA-based data and pixel processing applications course is described, which uses a structured, top-down, and finite state machine-based design and documentation methodology. Application examples include image thresholding, Sobel edge detection and a breakout game. The course provides a lesson for each application component, with downloadable AMD Xilinx Vivado project and VHDL model templates. Vicilogic lessons reference HDLGen, an open-source client application, developed by the Vicilogic team. HDLGen provides a wizard for fast, automated creation of System on Chip HDL models, testbench, Electronic Design Automation project and Tool Command Language scripts. The paper also presents the extended integrated development and debug environment (IDE), used in the reported Vicilogic RV32I RISC-V Online Tutor course. This IDE provides remote RISC-V assembly program application development and debugging. A remote RISC-V breakout game application is illustrated.
AB - Vicilogic links online learning, assessment, and prototyping with remote Field Programmable Gate Array (FPGA) hardware. Vicilogic provides online training and practice in digital systems design, RISC-V computer architecture and applications, and FPGA-based data and pixel processing applications. The Vicilogic course browser interacts with transparently with an array of remote FPGA, controlling and probing real remote hardware signals. This enables presentation of a visually rich, interactive learn-by-doing pedagogy, supporting guided learning, self-paced training, component sandboxes, knowledge checks, automated hardware application execution demos and remote FPGA prototyping. The Vicilogic course builder provides course tutors with the facility to create new course modules and to select individual lessons to create a tailored, indexed course to align with their curriculum. This paper presents the current Vicilogic course portfolio, available to Electronic and Computer Engineering and Computer Science audiences. The recently developed FPGA-based data and pixel processing applications course is described, which uses a structured, top-down, and finite state machine-based design and documentation methodology. Application examples include image thresholding, Sobel edge detection and a breakout game. The course provides a lesson for each application component, with downloadable AMD Xilinx Vivado project and VHDL model templates. Vicilogic lessons reference HDLGen, an open-source client application, developed by the Vicilogic team. HDLGen provides a wizard for fast, automated creation of System on Chip HDL models, testbench, Electronic Design Automation project and Tool Command Language scripts. The paper also presents the extended integrated development and debug environment (IDE), used in the reported Vicilogic RV32I RISC-V Online Tutor course. This IDE provides remote RISC-V assembly program application development and debugging. A remote RISC-V breakout game application is illustrated.
KW - Assembly language
KW - Assessment
KW - Course builder
KW - FPGA prototyping
KW - Online learning
KW - Remote laboratory
KW - RISC-V
UR - https://www.scopus.com/pages/publications/85181808925
U2 - 10.1007/978-3-031-42467-0_25
DO - 10.1007/978-3-031-42467-0_25
M3 - Conference Publication
AN - SCOPUS:85181808925
SN - 9783031424663
T3 - Lecture Notes in Networks and Systems
SP - 273
EP - 285
BT - Open Science in Engineering - Proceedings of the 20th International Conference on Remote Engineering and Virtual Instrumentation
A2 - Auer, Michael E.
A2 - Langmann, Reinhard
A2 - Tsiatsos, Thrasyvoulos
PB - Springer Science and Business Media Deutschland GmbH
Y2 - 1 March 2023 through 3 March 2023
ER -
