SeReCon: A secure reconfiguration controller for self-reconfigurable systems

Krzysztof Kepa, Fearghal Morgan, Krzysztof Kościuszkiewicz, Tomasz Surmacz

Research output: Contribution to a Journal (Peer & Non Peer)Articlepeer-review

16 Citations (Scopus)

Abstract

A risk of covert insertion of circuitry into reconfigurable computing (RC) systems exists. This paper reviews risks of hardware attack on field programmable gate array (FPGA)-based RC systems and proposes a method for secure system credentials generation (unique, random and partially anonymous) and trusted self-reconfiguration, using a secure reconfiguration controller (SeReCon) and partial reconfiguration (PR). SeReCon provides a root of trust (RoT) for RC systems, incorporating novel algorithms for security credentials generation and trusted design verification. Credentials are generated internally, during system certification. The private credential element never leaves the SeReCon security perimeter. To provide integrity-maintaining self-reconfiguration, SeReCon performs analysis of each new IP core structure prior to reconfiguration. An unverified IP core can be used provided that its spatial isolation is retained. SeReCon provides encrypted storage for installed IP cores. Resource usage for a prototype SeReCon system is presented. The protection provided by SeReCon is illustrated in a number of security attack scenarios.

Original languageEnglish
Pages (from-to)86-103
Number of pages18
JournalInternational Journal of Critical Computer-Based Systems
Volume1
Issue number1-3
DOIs
Publication statusPublished - 2010

Keywords

  • Critical embedded systems
  • Design assurance
  • Design integrity
  • Design security
  • Field programmable gate array
  • FPGA
  • Partial reconfiguration
  • Reconfigurable computing
  • Self-reconfiguration
  • Trusted computing

Fingerprint

Dive into the research topics of 'SeReCon: A secure reconfiguration controller for self-reconfigurable systems'. Together they form a unique fingerprint.

Cite this