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Overcome the limitations of performance parameters of on-chip antennas based on metasurface and coupled feeding approaches for applications in system-on-chip for THz integrated-circuits

  • Electronic Engineering Department
  • University of Rome "Tor Vergata"
  • London Metropolitan University
  • Edinburgh Napier University
  • University of Bolton
  • University of Bradford
  • Public University of Navarre

Research output: Chapter in Book or Conference Publication/ProceedingConference Publicationpeer-review

23 Citations (Scopus)

Abstract

This paper proposes a new solution to improve the performance parameters of on-chip antenna designs on standard CMOS silicon (Si.) technology. The proposed method is based on applying the metasurface technique and exciting the radiating elements through coupled feed mechanism. The on-chip antenna is constructed from three layers comprising Si.-GND-Si. layers, so that the ground (GND) plane is sandwiched between two Si. layers. The silicon and ground-plane layers have thicknesses of 20mu m and 5mu m, respectively. The 3×3 array consisting of the asterisk-shaped radiating elements has implemented on the top silicon layer by applying the metasurface approach. Three slot lines in the ground-plane are modelled and located directly under the radiating elements. The radiating elements are excited through the slot-lines using an open-circuited microstrip-line constructed on the bottom silicon layer. The proposed method to excite the structure is based on the coupled feeding mechanism. In addition, by the proposed feeding method the on-chip antenna configuration supresses the substrate losses and surface-waves. The antenna exhibits a large impedance bandwidth of 60GHz from 0.5THz to 0.56THz with an average radiation gain and efficiency of 4.58dBi and 25.37%, respectively. The proposed structure has compact dimensions of 200×200×45μm3. The results shows that, the proposed technique is therefore suitable for on-chip antennas for applications in system-on-chip for terahertz (THz) integrated circuits.

Original languageEnglish
Title of host publicationProceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages246-248
Number of pages3
ISBN (Electronic)9781728135175
DOIs
Publication statusPublished - Dec 2019
Externally publishedYes
Event2019 IEEE Asia-Pacific Microwave Conference, APMC 2019 - Singapore, Singapore
Duration: 10 Dec 201913 Dec 2019

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC
Volume2019-December

Conference

Conference2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
Country/TerritorySingapore
CitySingapore
Period10/12/1913/12/19

Keywords

  • CMOS silicon (Si.) technology
  • Coupled feeding mechanism
  • Ground (GND)
  • Metasurface
  • On-chip antennas
  • Terahertz (THz) systems-on-chip applications
  • THz integrated circuits

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