IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS (ICCE 2011)

Research output: Chapter in Book or Conference Publication/ProceedingConference Publicationpeer-review

Abstract

The implementation of a dual image processing pipeline camera on a state-of-art FPGA system is described. This camera can simultaneously acquire dual images of a scene and process, analyze and merge both images to enable a range of real-time image enhancement algorithms to be explored. Several examples of image enhancement algorithms implemented on the prototype camera are described.
Original languageEnglish (Ireland)
Title of host publicationA Dual Image Processing Pipeline Camera with CE Applications
Number of pages2
Publication statusPublished - 1 Nov 2011

Authors (Note for portal: view the doc link for the full list of authors)

  • Authors
  • Andorko, I,Corcoran, P,Bigioi, P,

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