ICCapt: Online design capture and HDL generation, with PYNQ SoC prototyping in the cloud

Aidan Boyd; Frank Callaly; Daire Canavan; Declan Orloughlin; Jeremy Audiger; Yohan Boyer; Niall Timlin-Canning; Arthur Vianes; Clement Da-Costa; Fearghal Morgan; Laszlo Bako; Szabolcs Hajdu

doi:10.1109/ISSC.2018.8585366

ICCapt: Online design capture and HDL generation, with PYNQ SoC prototyping in the cloud

Aidan Boyd
, Frank Callaly
, Daire Canavan
, Declan Orloughlin
, Jeremy Audiger
, Yohan Boyer
, Niall Timlin-Canning
, Arthur Vianes
, Clement Da-Costa
, Fearghal Morgan
, Laszlo Bako
, Szabolcs Hajdu

Electrical & Electronic Engineering

University of Galway
SAPIENTIA - Hungarian University of Transylvania

Research output: Chapter in Book or Conference Publication/Proceeding › Conference Publication › peer-review

Abstract

For students of digital logic design and applications, prototyping of FPGA/SoC digital logic hardware requires knowledge of design principles, hardware description language (HDL) modelling and testbenching, and Electronic Design Automation tools. There is limited availability of locally-installed (or in-house) tools which offer high level wizard-based parameterisable graphical digital logic design capture, with auto-generation of HDL. This paper presents ICCapt, a browser-based parameterisable graphical digital logic design capture wizard. ICCapt enables fast design capture, with auto-generation of synthesisable HDL models. ICCapt integrates with the viciLab cloud FPGA/SoC hardware prototyping and client application console creation toolsuite. Students can build hardware prototypes in the cloud, and visually interact with remote hardware in real time, using their ICCapt-generated block diagrams in the client console. ICCapt helps students to better understand the hierarchical structure of digital logic design and HDLs. The paper presents a series of design-To-prototype examples, and describes the ICCapt web tool architecture and its functions.

Original language	English
Title of host publication	29th Irish Signals and Systems Conference, ISSC 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781538660461
DOIs	https://doi.org/10.1109/ISSC.2018.8585366
Publication status	Published - 20 Dec 2018
Event	29th Irish Signals and Systems Conference, ISSC 2018 - Belfast, United Kingdom Duration: 21 Jun 2018 → 22 Jun 2018

Publication series

Name	29th Irish Signals and Systems Conference, ISSC 2018

Conference

Conference	29th Irish Signals and Systems Conference, ISSC 2018
Country/Territory	United Kingdom
City	Belfast
Period	21/06/18 → 22/06/18

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 9 Industry, Innovation, and Infrastructure

Keywords

digital design
documentation generation
HDL generation
online design capture
online FPGA prototyping
SoC

Access to Document

10.1109/ISSC.2018.8585366

Cite this

Boyd, A., Callaly, F., Canavan, D., Orloughlin, D., Audiger, J., Boyer, Y., Timlin-Canning, N., Vianes, A., Da-Costa, C., Morgan, F., Bako, L., & Hajdu, S. (2018). ICCapt: Online design capture and HDL generation, with PYNQ SoC prototyping in the cloud. In 29th Irish Signals and Systems Conference, ISSC 2018 Article 8585366 (29th Irish Signals and Systems Conference, ISSC 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSC.2018.8585366

@inproceedings{a9d5cfc57d7341b9a4131d2a66a651d2,

title = "ICCapt: Online design capture and HDL generation, with PYNQ SoC prototyping in the cloud",

abstract = "For students of digital logic design and applications, prototyping of FPGA/SoC digital logic hardware requires knowledge of design principles, hardware description language (HDL) modelling and testbenching, and Electronic Design Automation tools. There is limited availability of locally-installed (or in-house) tools which offer high level wizard-based parameterisable graphical digital logic design capture, with auto-generation of HDL. This paper presents ICCapt, a browser-based parameterisable graphical digital logic design capture wizard. ICCapt enables fast design capture, with auto-generation of synthesisable HDL models. ICCapt integrates with the viciLab cloud FPGA/SoC hardware prototyping and client application console creation toolsuite. Students can build hardware prototypes in the cloud, and visually interact with remote hardware in real time, using their ICCapt-generated block diagrams in the client console. ICCapt helps students to better understand the hierarchical structure of digital logic design and HDLs. The paper presents a series of design-To-prototype examples, and describes the ICCapt web tool architecture and its functions.",

keywords = "digital design, documentation generation, HDL generation, online design capture, online FPGA prototyping, SoC",

author = "Aidan Boyd and Frank Callaly and Daire Canavan and Declan Orloughlin and Jeremy Audiger and Yohan Boyer and Niall Timlin-Canning and Arthur Vianes and Clement Da-Costa and Fearghal Morgan and Laszlo Bako and Szabolcs Hajdu",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 29th Irish Signals and Systems Conference, ISSC 2018 ; Conference date: 21-06-2018 Through 22-06-2018",

year = "2018",

month = dec,

day = "20",

doi = "10.1109/ISSC.2018.8585366",

language = "English",

series = "29th Irish Signals and Systems Conference, ISSC 2018",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "29th Irish Signals and Systems Conference, ISSC 2018",

}

Boyd, A, Callaly, F, Canavan, D, Orloughlin, D, Audiger, J, Boyer, Y, Timlin-Canning, N, Vianes, A, Da-Costa, C, Morgan, F, Bako, L & Hajdu, S 2018, ICCapt: Online design capture and HDL generation, with PYNQ SoC prototyping in the cloud. in 29th Irish Signals and Systems Conference, ISSC 2018., 8585366, 29th Irish Signals and Systems Conference, ISSC 2018, Institute of Electrical and Electronics Engineers Inc., 29th Irish Signals and Systems Conference, ISSC 2018, Belfast, United Kingdom, 21/06/18. https://doi.org/10.1109/ISSC.2018.8585366

ICCapt: Online design capture and HDL generation, with PYNQ SoC prototyping in the cloud. / Boyd, Aidan; Callaly, Frank; Canavan, Daire et al.
29th Irish Signals and Systems Conference, ISSC 2018. Institute of Electrical and Electronics Engineers Inc., 2018. 8585366 (29th Irish Signals and Systems Conference, ISSC 2018).

Research output: Chapter in Book or Conference Publication/Proceeding › Conference Publication › peer-review

TY - GEN

T1 - ICCapt

T2 - 29th Irish Signals and Systems Conference, ISSC 2018

AU - Boyd, Aidan

AU - Callaly, Frank

AU - Canavan, Daire

AU - Orloughlin, Declan

AU - Audiger, Jeremy

AU - Boyer, Yohan

AU - Timlin-Canning, Niall

AU - Vianes, Arthur

AU - Da-Costa, Clement

AU - Morgan, Fearghal

AU - Bako, Laszlo

AU - Hajdu, Szabolcs

PY - 2018/12/20

Y1 - 2018/12/20

N2 - For students of digital logic design and applications, prototyping of FPGA/SoC digital logic hardware requires knowledge of design principles, hardware description language (HDL) modelling and testbenching, and Electronic Design Automation tools. There is limited availability of locally-installed (or in-house) tools which offer high level wizard-based parameterisable graphical digital logic design capture, with auto-generation of HDL. This paper presents ICCapt, a browser-based parameterisable graphical digital logic design capture wizard. ICCapt enables fast design capture, with auto-generation of synthesisable HDL models. ICCapt integrates with the viciLab cloud FPGA/SoC hardware prototyping and client application console creation toolsuite. Students can build hardware prototypes in the cloud, and visually interact with remote hardware in real time, using their ICCapt-generated block diagrams in the client console. ICCapt helps students to better understand the hierarchical structure of digital logic design and HDLs. The paper presents a series of design-To-prototype examples, and describes the ICCapt web tool architecture and its functions.

AB - For students of digital logic design and applications, prototyping of FPGA/SoC digital logic hardware requires knowledge of design principles, hardware description language (HDL) modelling and testbenching, and Electronic Design Automation tools. There is limited availability of locally-installed (or in-house) tools which offer high level wizard-based parameterisable graphical digital logic design capture, with auto-generation of HDL. This paper presents ICCapt, a browser-based parameterisable graphical digital logic design capture wizard. ICCapt enables fast design capture, with auto-generation of synthesisable HDL models. ICCapt integrates with the viciLab cloud FPGA/SoC hardware prototyping and client application console creation toolsuite. Students can build hardware prototypes in the cloud, and visually interact with remote hardware in real time, using their ICCapt-generated block diagrams in the client console. ICCapt helps students to better understand the hierarchical structure of digital logic design and HDLs. The paper presents a series of design-To-prototype examples, and describes the ICCapt web tool architecture and its functions.

KW - digital design

KW - documentation generation

KW - HDL generation

KW - online design capture

KW - online FPGA prototyping

KW - SoC

UR - https://www.scopus.com/pages/publications/85060831190

U2 - 10.1109/ISSC.2018.8585366

DO - 10.1109/ISSC.2018.8585366

M3 - Conference Publication

AN - SCOPUS:85060831190

T3 - 29th Irish Signals and Systems Conference, ISSC 2018

BT - 29th Irish Signals and Systems Conference, ISSC 2018

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 21 June 2018 through 22 June 2018

ER -

Boyd A, Callaly F, Canavan D, Orloughlin D, Audiger J, Boyer Y et al. ICCapt: Online design capture and HDL generation, with PYNQ SoC prototyping in the cloud. In 29th Irish Signals and Systems Conference, ISSC 2018. Institute of Electrical and Electronics Engineers Inc. 2018. 8585366. (29th Irish Signals and Systems Conference, ISSC 2018). doi: 10.1109/ISSC.2018.8585366

ICCapt: Online design capture and HDL generation, with PYNQ SoC prototyping in the cloud

Abstract

Publication series

Conference

UN SDGs

Keywords

Access to Document

Other files and links

Fingerprint

Cite this