@inproceedings{cf82e57fcdd44006be83e108872d3531,
title = "HDLGen-ChatGPT Case Study: RISC-V Processor VHDL and Verilog Model, Testbench and EDA Project Generation",
abstract = "This paper presents the open source HDLGen-ChatGPT application, working in tandem with ChatGPT-3.5, the free online large language model (LLM) chat interface. The tools enable fast digital systems design and test specification capture, and automatic generation of both VHDL and Verilog models, and testbenches, and AMD Vivado and Intel Quartus Electronic Design Automation (EDA) projects. EDA tools check the generated HDL syntax, simulate and synthesise HDL models, and follow the steps to FPGA hardware prototyping. The tools exploit a formal, top-down design and test specification documentation process, domain knowledge, and the flexibility of LLMs, for HDL code generation. Results are included for a hierarchical RV32I RISC-V processor design. Process steps are illustrated for the RISC-V 32 x 32-bit register bank component. The process typically requires only minimal manual HDL capture or editing, and often none at all. URLs to tutorial videos for the complete RISC-V design are provided on the GitHub project repository. The paper evaluates the results and provides HDLGen-ChatGPT and ChatGPT usage recommendations. The tools can be applied in digital systems training programmes, with reduced emphasis on the assessment of HDL model and testbench capture and generation, while maintaining strong emphasis on the assessment of system design, test planning and documentation, HDL simulation verification/debug, and analysis of synthesised netlists.",
keywords = "Automation, ChatGPT, Design Capture, Digital Systems Design, EDA, FPGA, Generative AI, HDL, HDLGen-ChatGPT, LLM, testbench, Verilog, VHDL",
author = "Fearghal Morgan and Roshan George and Se{\'a}n Kelly and Byrne, \{John Patrick\} and Adnan Elahi and Declan O{\textquoteright}Loughlin and Abishek Bupathi and Frank Callaly",
note = "Publisher Copyright: {\textcopyright} 2023 Copyright held by the owner/author(s).; 34th International Workshop on Rapid System Prototyping, RSP 2023 ; Conference date: 21-09-2023",
year = "2023",
month = sep,
day = "21",
doi = "10.1145/3625223.3649280",
language = "English",
series = "Proceedings - IEEE International Symposium on Rapid System Prototyping, RSP",
publisher = "IEEE Computer Society",
booktitle = "Proceedings of the 34th International Workshop on Rapid System Prototyping",
}