Abstract
Electronic design tools and techniques for the implementation of a stereoscopic camera based on an FPGA (Field Programmable Gate Array) are presented. The stages of an IPP (Image Processing Pipeline) are presented together with the development tools and languages used to implement a stereoscopic camera in hardware. In a further development of the basic system, aspects of the implementation of a 3D camera are presented.
| Original language | English (Ireland) |
|---|---|
| Media of output | Conference Paper |
| Publisher | IEEE |
| DOIs | |
| Publication status | Published - 1 Jan 2010 |
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