Abstract
The implementation of a dual image processing pipeline camera on a state-of-art FPGA system is described. This camera can simultaneously acquire dual images of a scene and process, analyze and merge both images to enable a range of real-time image enhancement algorithms to be explored. Several examples of image enhancement algorithms implemented on the prototype camera are described.
| Original language | English (Ireland) |
|---|---|
| Title of host publication | IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS (ICCE 2011) |
| Publisher | IEEE |
| Publication status | Published - 1 Jan 2011 |
Authors (Note for portal: view the doc link for the full list of authors)
- Authors
- Andorko, I;Corcoran, P;Bigioi, P